Language of instruction : English |
Sequentiality
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Advising sequentiality bound on the level of programme components
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Following programme components are advised to also be included in your study programme up till now.
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Chip design (3099)
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4.0 stptn |
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Applied analog electronics (2602)
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4.0 stptn |
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| Degree programme | | Study hours | Credits | P2 SBU | P2 SP | 2nd Chance Exam1 | Tolerance2 | Final grade3 | |
| Master of Electronics and ICT Engineering Technology | Optional | 108 | 4,0 | 108 | 4,0 | Yes | Yes | Numerical | |
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| Learning outcomes |
- EC
| EC1 - The holder of the degree thinks and acts professionally with an appropriate engineering attitude and continuous focus on personal development, adequately communicates, effectively cooperates, takes into account the economical, ethical, social and/or international context and is hereby aware of the impact on the environment. | | - DC
| DC-M8 - can evaluate knowledge and skills critically to adjust own reasoning and course of action accordingly. | | | - BC
| The student needs to be able to assess the impact of the different design criteria and needs to be able to justify why changing specific parameters can yield changes in response | | - DC
| DC-M9 - can communicate in oral and in written (also graphical) form. | | | - BC
| Design schematics and response curves need to be reported and explained. | | - DC
| DC-M10 - can function constructively and responsibly as member of a (multidisciplinary) team. | | | - BC
| Design assignments can be given to groups and interaction in the team will be needed to yield a working circuit. | | - DC
| DC-M12 - shows a suitable engineering attitude. | | | - BC
| The student needs to be able to select the appropriate parameters to improve the designs and subsequently elaborate those to yield an optimal design. | - EC
| EC6 - The holder of the degree has specialist knowledge of and insight in principles and applications within the domains of analogue electronics, in which he/she can independently initiate, plan, critically analyse and create solid solutions with eye for data processing and implementation, with the help of simulation techniques or advanced tools, while being aware of potential mistakes, practical constraints and with attention to the topical technological developments. | | - DC
| DC-M1 - has knowledge of the basic concepts, structures and coherence. | | | - BC
| In a given unknown schematic, the student needs to be able to recognize the function and the goal of specific transistors and needs to be able to change this to target a different operation. | | - DC
| DC-M2 - has insight in the basic concepts and methods. | | | - BC
| In a given unknown schematic, the student needs to be able to recognize the function and the goal of specific transistors and needs to be able to change this to target a different operation. | | - DC
| DC-M3 - can recognize problems, plan activities and perform accordingly. | | | - BC
| When the student obtains results from his simulations which do not match expectations, the students needs to be able to why these are obtained and what can be changed in the design to get better results in upcoming simulations. The student also needs to plan all required simulation to get the expected result in time. | | - DC
| DC-M4 - can gather, measure or obtain information and refer to it correctly. | | | - BC
| Comparing obtained results with literature is crucial. The student need to find the corresponding papers and explain why their results are different. Obviously, correct referring to literature is key. | | - DC
| DC-M5 - can analyze problems, logically structure and interpret them. | | | - BC
| Given a specific design description, a selection of what to focus on will be needed. We will assess the method and the steps the student has to to reach his design goals. | | - DC
| DC-M6 - can select methods and make calculated choices to solve problems or design solutions. | | | - BC
| We will assess the outcome of the different calculated design options and compare this outcome with what has been expected. | | - DC
| DC-M7 - can use selected methods and tools to implement solutions and designs. | | | - BC
| A broad range of design tools are available. We will evaluate whether or not the student has selected the correct tools and methods to yield the appropriate design solutions | | - DC
| DC-M8 - can evaluate knowledge and skills critically to adjust own reasoning and course of action accordingly. | | | - BC
| The student need to be able to indicate also the shortcomings of his/her proposed design and indicate what could have been done to improve in future or upcoming iterations. |
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| EC = learning outcomes DC = partial outcomes BC = evaluation criteria |
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The students need to understand the behavior of silicon devices and their application in integrated circuits. The students need to be able to apply these device equations in their designed circuits.
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The students also need to know the basic lay-out techniques for circuits (e.g. from digital integrated circuits) in order to apply them for analog integrated circuits.
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This course contains two parts.
The first part goes deeper in the design and optimization of integrated analog amplifier circuits. Starting from a basis operational amplifier design, we will add step by step additional building blocks to improve the operation. Finally we will end by designing a double folded cascode amplifier operating R2R.
The second part discusses additional techniques to improve the design (noise, ..) and schematics to understand (high-frequent) analog systems.
This master course is conceived as a capita selecta to elaborate and consolidate the knowledge of the students.
Key terms:
analog integrated circuits, cascode transistors, Folded cascode circuits, Parasitic pools, superconductors, Bootstap, Hybrid coupling, Noise, Latch-up
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Lecture ✔
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Practical ✔
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Report ✔
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Period 2 Credits 4,00
Evaluation method | |
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Practical evaluation during teaching period | 34 % |
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Transfer of partial marks within the academic year | ✔ |
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Evaluation conditions (participation and/or pass) | ✔ |
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Conditions | 1. The student has to be present during the sessions of the design studio.
2. The student had to deliver the report of the design studio. |
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Consequences | 1. If the student is absent during one or more sessions of the design studio he receives an N (did not participate in all evaluations) for the entire course unit.
2. If the student did not deliver the report of the design studio he receives an N (did not participate in all evaluations) for the entire course unit. |
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Second examination period
Evaluation second examination opportunity different from first examination opprt | |
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Explanation (English) | No second exam chance for the practical evaluation during the teaching period. The mark of the first exam period is transferred to the second exam period.
Only if the delivered report for the design studio was insufficient, late or incomplete, the student gets the chance to submit a new, more elaborated, report for the second exam period. |
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Compulsory course material |
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Notes and PowerPoint slides are available on Toledo |
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| Exchange Programme Engineering Technology | Optional | 108 | 4,0 | 108 | 4,0 | Yes | Yes | Numerical | |
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The students need to understand the behavior of silicon devices and their application in integrated circuits. The students need to be able to apply these device equations in their designed circuits.
|
The students also need to know the basic lay-out techniques for circuits (e.g. from digital integrated circuits) in order to apply them for analog integrated circuits.
|
|
|
This course contains two parts.
The first part goes deeper in the design and optimization of integrated analog amplifier circuits. Starting from a basis operational amplifier design, we will add step by step additional building blocks to improve the operation. Finally we will end by designing a double folded cascode amplifier operating R2R.
The second part discusses additional techniques to improve the design (noise, ..) and schematics to understand (high-frequent) analog systems.
This master course is conceived as a capita selecta to elaborate and consolidate the knowledge of the students.
Key terms:
analog integrated circuits, cascode transistors, Folded cascode circuits, Parasitic pools, superconductors, Bootstap, Hybrid coupling, Noise, Latch-up
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Lecture ✔
|
|
|
Practical ✔
|
|
|
|
|
|
Report ✔
|
|
|
|
Period 2 Credits 4,00
Evaluation method | |
|
Practical evaluation during teaching period | 34 % |
|
Transfer of partial marks within the academic year | ✔ |
|
|
|
|
|
|
Evaluation conditions (participation and/or pass) | ✔ |
|
Conditions | 1. The student has to be present during the sessions of the design studio.
2. The student had to deliver the report of the design studio. |
|
|
|
Consequences | 1. If the student is absent during one or more sessions of the design studio he receives an N (did not participate in all evaluations) for the entire course unit.
2. If the student did not deliver the report of the design studio he receives an N (did not participate in all evaluations) for the entire course unit. |
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|
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Second examination period
Evaluation second examination opportunity different from first examination opprt | |
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Explanation (English) | No second exam chance for the practical evaluation during the teaching period. The mark of the first exam period is transferred to the second exam period.
Only if the delivered report for the design studio was insufficient, late or incomplete, the student gets the chance to submit a new, more elaborated, report for the second exam period. |
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|
|
 
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Compulsory course material |
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Notes and PowerPoint slides are available on Toledo |
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1 Education, Examination and Legal Position Regulations art.12.2, section 2. |
2 Education, Examination and Legal Position Regulations art.16.9, section 2. |
3 Education, Examination and Legal Position Regulations art.15.1, section 3.
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Legend |
SBU : course load | SP : ECTS | N : Dutch | E : English |
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