System-on-Chip design and experimentation (9055) |
| Credits: 5,0 | | Study load hours: 135 | Period: semester 2 (5sp)  |
| Language of instruction: English | | Exam contract: not possible |
|
|
Advising sequentiality bound on the level of programme components
|
| |
| |
| |
Following programme components are advised to also be included in your study programme up till now.
|
| |
|
Digital electronic circuits (4081)
|
4.0 stptn | |
| |
|
|
|
|
The student is:
* familiar with writing and compiling (low-level) C-code
* capable of using a command-line interface (CLI)
* capable of making digital electronic designs and describing them in VHDL
|
|
|
|
|
This course gradually teaches the principles behind a System-on-Chip. Next to the processor, a SoC also contains memories and peripherals which are all connected through busses. Without any interaction to the outside world, a SoC would be pointless, so peripherals for outside communication are also discussed. Finally, some more advanced topics like accelerators and tackling different clock domains will be taught.
|
|
| Mandatory software |
| |
To partake in the course, these parts of software are essential. All of them can be obtained freely and many different clients are available on the Internet.
* a secure shell (SSH) client
- MobaXterm (https://mobaxterm.mobatek.net/)
* a Virtual Private Network (VPN) client
* a VNC viewer
Finally, you need two more tools that can come preinstalled on your OS.
* a browser
* an editor
|
|
|
| Remarks |
| |
This course is part of the digital electronics learning trajectory. In this course several disciplines are combined to design and use a system-on-chip. Students are encouraged to reuse their design from "Computer Architectures (3435)". |
|
|
|
|
|
|
|
|
|
Application Lecture ✔
|
|
|
|
Lecture ✔
|
|
|
|
Small group session ✔
|
|
|
|
|
|
|
|
Exercises ✔
|
|
|
|
Homework ✔
|
|
|
|
Semester 2 (5,00sp)
| Evaluation method | |
|
| Practical evaluation during teaching period | 40 % |
|
| Transfer of partial marks within the academic year | Yes, no resit exam |
|
|
|
|
|
| Written exam | 60 % |
|
|
| Multiple-choice questions | ✔ |
|
|
|
|
|
|
| Additional information | For specific guidelines and possible consequences regarding the use of AI, please consult Toledo/Blackboard. |
|
Second examination period
| Evaluation second examination opportunity different from first examination opprt | |
|
| Explanation (English) | No second chance for the assignments. The results from the first exam
period will be transferred.
There is only a second chance for the written exam. |
|
|
|
|
Learning outcomes | EC = learning outcomes DC = partial outcomes BC = evaluation criteria |
Bachelor of Engineering Technology
|
- EC
| EC1 - The holder of thedegreepossesses general scientific and technological application-oriented knowledge of the basic concepts, structures and coherence of the specific domain. | | | - DC
| EA 1.5 The student knows the operation and function of the (advanced) functional building blocks for digital circuits. | | | | - BC
| The student knows the design aspects of hardware, organization and architecture of complex digital systems. | | | - DC
| EA 1.6 The student knows the basic principles of hardware description languages. | | | | - BC
| The student knows advanced constructs of modern hardware desciption languages.
The student knows the use of advanced HDLs for simulation, test benches and synthesis. | - EC
| EC2 - The holder of thedegreepossesses general scientific and discipline-related engineering-technical insight in the basic concepts, methods, conceptual frameworks and interdependent relations of the specific domain. | | | - DC
| EA 2.5 The student has insight into the functionality of (advanced) digital components, signals and systems. | | | | - BC
| The student understands the design concepts of complex digital hardware systems.
The student understands the impact of architectural decisions on the performance of complex digital systems. | - EC
| EC3 - The holder of thedegreeis able to recognize problems independently and can take initiative to plan activities and perform accordingly. | | | - DC
| 3.2 The student can plan a technical-scientific project in a structured manner. | | | | - BC
| The student can initiate and plan the design of a complex digital system. | - EC
| EC4 - The holder of thedegreecan gather and obtain relevant scientific and/or technical information and/or he/she can measure the necessary information efficiently and conscientiously. Additionally, he/she can make correct references to information. | | | - DC
| 4.1 The student can look up scientific and/or technical information in a goal-oriented manner. | - EC
| EC6 - The holder of thedegreecan select and use adequate solution methods to solve unknown, domain-specific problems and can work methodologically and make solid design choices. | | | - DC
| EA 6.6 The student can design an advanced digital system. | - EC
| EC9 - The holder of thedegreecan communicate with colleagues in oral and in written form (including in a graphical way) about domain-specific aspects in suited language making use of apt terminology. | | | - DC
| 9.1 The student is able to communicate in writing in a correct, structured and appropriate manner in languages relevant to their field of study. | | | | - BC
| The student is able to design, evaluate and adapt complex SoC architectures by means of simulation tools. | | | - DC
| 9.2 The student can communicate orally in a correct, structured and appropriate way in languages relevant to his field of study. |
|
|
|
|
| Included in these programmes | Tolerance3 |
|
3rd year Bachelor of Engineering Technology - Electronics and ICT Engineering Technology
|
Y
|
|
Bridging programme Electronics and ICT Engineering Technology - part 2
|
Y
|
|
Exchange Programme Engineering Technology
|
Y
|
|
|
1 Education, Examination and Legal Position Regulations art.12.2, section 2. |
| 2 Education, Examination and Legal Position Regulations art.15.1, section 3. |
3 Education, Examination and Legal Position Regulations art.16.9, section 2.
|
|
|